The HJS22 has the following hardware registers:
- 8 bit Accumulator (Acc). [TTL 7475]
- 16 bit memory address registers (M-reg). [TTL 74191]
- 24 bit Program Status Word (PSW):
8 bits Status (Carry, Shift, Condition, Interrupt level) [TTL 7475]
16 bits Program Counter. [TTL 74191]- 24 bit Instruction Register:
8 bits Instruction opcode. [TTL 7475]
16 bits Operands Address register (I-reg). [TTL 7475]- ALU result register (R-reg). [TTL 7475]
- Micro-code address register (P-reg). [TTL 74175]
This pdf file (1 Mbyte) contains scanned pages of the architecture.
Pages 1 & 2 Final architecture, dated 22 July 1979.
Page 3 One of the early versions, dated 5 September 1976.
An overview of the HJS22 instructionset can be seen on these HJS22 refenence card.
(typed at the back of two 80 column punch cards)
